Communications

The "Picture This..." Programme aims to apply engineering science to develop assistive systems for blind and visually impaired people. “Assistive systems” refers to the heterogenous collection of devices and supporting architectures and processes. Scientific/Technical themes include: distributed architectures for the analysis of signal, image and video data; cloud-based processing systems; algorithms for energy-efficient inference on mobile devices; crowdsourcing of data, including visual cues; visual detection of hazards; security and reliability of “crowdsourced” navigational information; new devices; methods and grammars for supporting heterogenous computing systems. We suggest strong emphasis on benchmarking performance, at all system levels: power, accuracy, latency, usability.

Diversity, in every dimension, is a key attribute of today’s data bonanza. Our research takes a holistic view, embracing this diversity and the consequent intricate interactions between users and systems. We created the Dispel data-streaming language to describe complex computation patterns at high levels of abstraction, while providing meta-information for optimisation. Provenance and contextual information must be harnessed to achieve autonomous execution, data placement, energy efficiency and reliability. Research is needed, that builds foundations for comprehensible and tractable paths through the rapidly evolving data landscape. This must be driven by and tested at realistic scales and diversity levels.

The design of next generation heterogeneous computing platforms is facing new challenges: the scaling provided by Moore’s law led to hitting the “power wall” as well as to falling under the law of diminishing returns, for which density increase was not met by accompanying performance increase. The use of heterogeneous multiprocessor platforms, both in the embedded and in the high performance computing seems the right approach to be followed. However, a number of new directions at the design and at run-time are now open to be explored for optimizing the system both in terms of performance and energy efficiency: number and type of processors, use of dedicated accelerators, resiliency of the overall system, mapping of applications into existing cores, software application customization, etc. In this poster, we summarize our research activity in the optimization of fault-tolerant and adaptive computing platforms, as results of the participation in several EU and national projects focusing on the development of methodologies for the multi-objective design space exploration of multiprocessor system-on-chip platforms.